Blog

• Shock Value
• New Stacking Issues

Norman Chang
VP and Sr. Product Strategist

• Signal Integrity’s Growing Complexity - Part 2
• Signal Integrity’s Growing Complexity - Part 1
• Stacking The Deck
• DesignCon 2012: Chip–Package–System Workshop Series
• Top 5 Reasons For Power Delivery Failure
• Chip-Package-System Co-Design
• What is CPS?

Matt Elmore
Principal Application Engineer

• ‘Early and accurate’ power analysis: myth or reality?
• Better Power Planning
• Power Delivery Networks

Preeti Gupta
Senior Technical Marketing Manager

• A Smart System Technology Renaissance

Margaret Schmitt
Director of Applications Engineering

• Clean Your Clock
• Waste Not, Want Not
• Top 5 Reasons For Power Consumption Waste
• The Essentials Of Power Budgeting

William Ruby
Sr. Director, Product Engineering for RTL Power

• Challenges In IC And Electronic Systems Verification - Part 3
• Challenges In IC And Electronic Systems Verification - Part 2
• Challenges In IC And Electronic Systems Verification - Part 1
• Reducing Cost And Mitigating Risk
• Preparing For 3DX
• The Next Steps
• Designing an ARM Based SoC: How to Meet Your Power Budget
• Power Budgeting 101
• Quicker Turnaround

Aveek Sarkar
VP, Product Engineering and Support

• Design For Reliability
• New Reliability Issues
• Reliability Verification For Smart ICs
• Noise Coupling Analysis

Arvind Shanmugaval
Director, Applications Engineering

• Picking The Right Models

Ji Zheng
R&D Director